We currently have one open PhD Positions at Institut Pascal (France). Please find the announcements below:

For the Innovative Training Network (ITN) project ACHIEVE ( ) – AdvanCed Hardware/Software components for Integrated/Embedded Vision systEms (H2020-MSCA-ITN-2017), we are looking for one motivated early stage researcher in Deep learning methods and digital systems (hardware description languages, FPGA and GPU architectures…).

The researcher fellow will be hosted at the Institut Pascal in the DREAM research group of Université Clermont-Auvergne (UCA), for a period of 36 months with the aim of obtaining a PhD. The DREAM group is working on hardware and software development of advanced computer vision architectures. It was formed in 2008 and until now we have been lucky to work with six visiting professors/researchers and more than 15 graduate students. The group is performing research in the following areas:

  • Design of smart cameras
  • Image processing architectures
  • Software methods and tools for embedded systems

The PhD training includes a second internship in the company NVIDIA ( ),
the famous producer of GPU. Nvidia is located in Paris.

Our offer

You will receive a PhD scholarship according to the general conditions at Université Blaise Pascal. Tax-fee scholarship includes full social security coverage (net monthly amount starting at ± 2.300 EUR/month + 250 EUR/month mobility allowance + (if applicable) family allowance of 500 EUR). The initial contract will be for a period of 1 year and will start in the third quarter of 2018; this contract should be extended for a total of 3 years, subject to good performance. You will work at the Institut Pascal research group. Information about research group can be found on the web:


The new researchers will therefore work as a team with existing researchers. They will also cooperate with the other researchers in the ACHIEVE network and participate in the ACHIEVE’s training program.

Deep learning (DL) [1] methods are currently adopted to solve an ever-greater number of problems in computer vision ranging from image classification to semantic segmentation and object detection [2]. Nevertheless, the execution of such algorithms involves a high computational load and requires a large amount of processing, which calls for dedicated and tailored hardware support [3].

For years, Graphical Processing Units (GPUs) have demonstrated state-of-the-art computational performance in DL acceleration. However, this task is shortly moving towards custom dedicated hardware implementations on FPGAs and ASICs, especially in embedded systems [4]. In fact, platforms like FPGAs and ASICs are known to deliver better computation/watt performances than GPUs. Moreover, recent trends in DL development demonstrate the efficiency of using extreme compact data types[5], [6]. These trends promote custom implementations in FPGAs that are designed to handle irregular parallelism and custom data types. Nonetheless, GPUs remain a target of choice to accelerate deep learning thanks to their growing computational capabilities [7] and ease of programmability.

In this context, the proposed PhD aims to investigate heterogenous embedded accelerators for deep learning with GPU/FPGA co-design. Within the DREAM research group, the main tasks are:

  1. Study state-of-the-art algorithms to accelerate deep learning inference and training [8], and tune them for embedded systems/smart cams.
  2. Portioning the deep learning processing pipeline on the resources of an heterogenous hardware platform.
  3. Derive efficient data-paths and hardware accelerators on GPU/FPGA-based embedded systems/smart cams.


[1]         Y. LeCun, Y. Bengio, and G. Hinton, “Deep learning,” Nature, vol. 521, no. 7553, pp. 436–444, 2015.

[2]         J. Gu, Z. Wang, J. Kuen, L. Ma, A. Shahroudy, B. Shuai, T. Liu, X. Wang, L. Wang, G. Wang, J. Cai, and T. Chen, “Recent Advances in Convolutional Neural Networks,” Pattern Recognit., 2017.

[3]         A. Canziani, A. Paszke, and E. Culurciello, “An Analysis of Deep Neural Network Models for Practical Applications,” arXiv e-print, May 2016.

[4]         E. Nurvitadhi et al.  “Can FPGAs Beat GPUs in Accelerating Next-Generation Deep Neural Networks?,” in Proceedings of the ACM/SIGDA International Symposium on Field-Programmable Gate Arrays – FPGA ’17, 2017, pp. 5–14.

[5]         M. Courbariaux, Y. Bengio, and J.-P. David, “BinaryConnect: Training Deep Neural Networks with binary weights during propagations,” in Advances in Neural Information Processing Systems – NIPS’15, 2015, pp. 3123–3131.

[6]         I. Hubara, M. Courbariaux, D. Soudry, R. El-Yaniv, and Y. Bengio, “Quantized Neural Networks: Training Neural Networks with Low Precision Weights and Activations,” J. Mach. Learn. Res., Sep. 2018.

[7]         Nvidia, “NVIDIA Volta: The New GPU Architecture, Designed to Bring AI to Every Industry.,” Webpage, 2018. [Online]. Available: [Accessed: 06-Apr-2018].

[8]         S. Winograd, Arithmetic complexity of computations, vol. 33. Siam, 1980.

Profile of the candidate

You have a Master of Science degree (at the start of the PhD) and a strong background in Digital design. Candidates with an MsC in another discipline but with good skills in programming languages, signal/image processing may also be considered.

You have a strong interest in image processing, embedded systems for computer vision, a good knowledge of mathematics, signal or image processing, and good programming skills. As stated in the preamble, you must have a working experience in digital system design (VHDL) and/or programming language implementation (C, C++, Cuda).

You function well in a team. You have good or excellent English and scientific writing skills. You combine a strong interest in scientific research with a desire to see your work applied in industry. Due to EC funding rules, only candidates with less than 4 years of research experience can be considered. Candidates MUST not have carried out their main activity (work-studies …) in France for more than 12 months in the past 3 years and must have carried out less than 4-year research experience starting on the date of achieving master degree. Université Clermont Auvergne implements gender-neutral recruitment and selection procedures. Female candidates are especially encouraged to apply.

How to apply

Please submit your application by email to Prof. Francois BERRY at

In your email, please include the following:

  • A brief motivation of your application: what do you consider the best facts in your CV, which demonstrate your academic excellence in BsC and/or Msc. education? What are your reasons to pursue a PhD? Why would you like to work at Université Clermont-Auvergne? …
  • A detailed CV, describing your earlier experience and studies;
  • A list of publications (if available);
  • A transcript of your educational record (list of courses per year, number of obtained credits, obtained marks) if available. This need not be official document at this stage;
  • A (rough) indication or estimate of your rank among other students (e.g., top 10% among 35 students in my master);
  • If available: 1-3 English language documents describing your earlier research (e.g., scientific papers, master thesis, report on project work, etc.). These documents need not be on the topic of the positions.

François BERRY

Master Systemes embarques pour le son et l’image:

tel: +33 (0)4 73 40 72 52